8086 Microprocessor

The 8086 Microprocessor is an enhanced version of 8085-Microprocessor that was designed by Intel in 1976. The 8086 Microprocessor architecture is an enhanced design of the 8085 microprocessor. It is a 16-bit Microprocessor having 20 address lines and 16 data lines that provides up to 1MB storage. It consists of a powerful instruction set, which provides operations like multiplication and division easily. It supports two modes of operation, i.e. Maximum mode and Minimum mode. The maximum mode is suitable for a system having multiple processors and the Minimum mode is suitable for a system having a single processor.

Features of 8086 Microprocessor

  • It has an instruction queue, which is capable of storing six instruction bytes from the memory resulting in faster processing.
  • It was the first 16-bit processor having 16-bit ALU, 16-bit registers, internal data bus, and 16-bit external data bus resulting in faster processing.
  • It is available in 3 versions based on the frequency of operation −

                  –>  8086 → 5MHz.

                  –> 8086-2 → 8MHz.

                  –>  8086-1 → 10 MHz.

  • It uses two stages of pipe-lining, i.e. Fetch Stage and Execute Stage, which improves performance.
  • Fetch stage can prefetch up to 6 bytes of instructions and stores them in the queue.
  • Execute stage executes these instructions.
  • It has 256 vectored interrupts.
  • It consists of 29,000 transistors.

8086 Microprocessor Architecture

The following diagram depicts the architecture of an 8086 Microprocessor. This 8086 Microprocessor architecture has so many advanced features over the 8085 Microprocessor architecture level design which makes the unique chip design. If you will think about the most important architecture level change, the name pipe-lining method will come to picture.

8086 microprocessor architecture
8086-Microprocessor Architecture

8086 Microprocessor is divided into two functional units, i.e., EU (Execution Unit) and BIU (Bus Interface Unit).

Execution Unit (EU) Of 8086 Microprocessor

The execution unit gives instructions to BIU stating from where to fetch the data and then decode and execute those instructions. Its function is to control operations on data using the instruction decoder & ALU. EU has no direct connection with system buses as shown in the above figure, it performs operations over data through BIU.

ALU: The ALU unit handles all arithmetic and logical operations, like +, −, ×, /, OR, AND, NOT operations.

Flag Register: It is a 16-bit register that behaves like a flip-flop, i.e. it changes its status according to the result stored in the accumulator. It has 9 flags and they are divided into 2 groups − Conditional Flags and Control Flags.

Conditional Flags: It represents the result of the last arithmetic or logical instruction executed. Following is the list of conditional flags −

  • Carry flag: This flag indicates an overflow condition for arithmetic operations.
  • Auxiliary flag: When an operation is performed at ALU, it results in a carry/borrow from lower nibble (i.e. D0 – D3) to upper nibble (i.e. D4 – D7), then this flag is set, i.e. carry given by D3 bit to D4 is AF flag. The processor uses this flag to perform binary to BCD conversion.
  • Parity flag: This flag is used to indicate the parity of the result, i.e. when the lower order 8-bits of the result contains even number of 1’s, then the Parity Flag is set. For an odd number of 1’s, the Parity Flag is reset.
  • Zero flags: This flag is set to 1 when the result of the arithmetic or logical operation is zero else it is set to 0.
  • Sign flag: This flag holds the sign of the result, i.e. when the result of the operation is negative, then the sign flag is set to 1 else set to 0.
  • Overflow flag: This flag represents the result when the system capacity is exceeded.

8086 Microprocessor Control Flags

  • Trap flag: It is used for single-step control and allows the user to execute one instruction at a time for debugging. If it is set, then the program can be run in a single-step mode.
  • Interrupt flag: It is an interrupt enable/disable flag, i.e. used to allow/prohibit the interruption of a program. It is set to 1 for interrupt enabled condition and set to 0 for interrupt disabled condition.
  • Direction flag: It is used in string operation. As the name suggests when it is set then string bytes are accessed from the higher memory address to the lower memory address and vice-a-versa.

8086 Microprocessor General-purpose register

There are 8 general-purpose registers, i.e., AH, AL, BH, BL, CH, CL, DH, and DL. These registers can be used individually to store 8-bit data and can be used in pairs to store 16bit data. The valid register pairs are AH and AL, BH and BL, CH and CL, and DH and DL. It is referred to the AX, BX, CX, and DX respectively.

  • AX register: It is also known as the accumulator register. It is used to store operands for arithmetic operations.
  • BX register: It is used as a base register. It is used to store the starting base address of the memory area within the data segment.
  • CX register: It is referred to as counter. It is used in loop instruction to store the loop counter.
  • DX register: This register is used to hold the I/O port address for I/O instruction.

8086 Microprocessor Stack pointer register

It is a 16-bit register that stores the address of the last program request in a stack. A stack is a specialized buffer that stores data from the top down.

Bus Interface Unit (BIU) of 8086 Microprocessor

This unit handles all transfer of data and addresses on the buses for the EU(execution unit). This unit sends out addresses, fetches instructions from memory, reads data from ports and memory, and writes data to ports and memory.

Different Components Of BIU

(1) Instruction pointer: It is a 16-bit register used to hold the address of the next instruction to be executed.

(2) Instruction queue: The BIU contains the instruction queue. BIU gets up to 6 bytes of the next instructions and stores them in the instruction queue. When the EU executes instructions and is ready for its next instruction, then it simply reads the instruction from this instruction queue resulting in increased execution speed. It is also responsible for fetching the next instruction while the current instruction executes is called pipelining.

(3) Segment register: BIU has 4 segment buses, i.e. CS, DS, SS& ES. It holds the addresses of instructions and data in memory, which are used by the processor to access memory locations. It also contains 1 pointer register IP, which holds the address of the next instruction to executed by the EU.

  • CS: It stands for Code Segment. It is used for addressing a memory location in the code segment of the memory, where the executable program is stored.
  • DS: It stands for the Data Segment. It consists of data used by the program and is accessed in the data segment by an offset address or the content of another register that holds the offset address.
  • SS: It stands for Stack Segment. It handles memory to store data and addresses during execution.
  • ES: It stands for Extra Segment. ES is an additional data segment, which is used by the string to hold the extra destination data.

8086 Microprocessor Pin Diagram

The figure below shows the 8086 microprocessor pin diagram

8086 microprocessor pin diagram
8086 Pin Diagram
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