Introduction To I2C Protocol:
TheĀ I2C Protocol, pronounced as I-squared-C, is a multi-master, multi-slave, packet-switched single-ended, serial-based synchronous type computer bus
TheĀ I2C Protocol, pronounced as I-squared-C, is a multi-master, multi-slave, packet-switched single-ended, serial-based synchronous type computer bus
The I2C is a serial protocol for a two-wire interface to connect low-speed devices like microcontrollers, EEPROMs, A/D and D/A converters, Automotive vehicle sensors, I/O interfaces and other similar peripherals in embedded systems. Each I2C slave device needs an address which must still be obtained from the NXP.
The I2C bus is very popular because it is very simple to use, there can be more than one master, only upper bus speed is defined and only two wires with pull-up resistors are needed to connect the number of devices. Mostly the maximum number of Slaves can be connectedĀ to the BUS depends on the slave address. If the slave address is 7-bit,Ā then the number of slaves that can be connected to the I2C BUS is 2^7 =Ā 128. The I2C can use even slower microcontrollers with general-purpose I/O pins since they only need to generate correct Start and Stop conditions in addition to functions for reading and writing a byte.
Each slave device has a unique address. Transfer from and to the master device is serial and it is split into 8-bit packets. All these simple requirements make it very simple to the implement I2C interface of the even with cheap microcontrollers that have no I2C hardware controller. You only need 2 free I/O pins and few simple i2C routines to send and receive the commands.
The initial I2C specifications of the defined maximum clock frequency of 100 kHz. This was later increased to the 400 kHz as
I2C Commands (simplified for communication:
The I2C is a serial bus protocol consisting of two signal lines such as SCL and SDL lines which are used to communicate with the devices. The SCL stands for a āserial clock lineā and this signal is always driven by the āmaster deviceā. The SDL stands for the āserial data lineā, and this signal is driven by either to the master or the I2C peripherals. Both these SCL and SDL lines are in an open-drain state when there is no transfer between I2C peripherals.
The open-drain is the concept for FET transistor wherein the drain terminal of the transistor is the open state. The SDL and SCL pins of the master device are designed with the transistors in the open state, so data transfer is possible only when these transistors are conducted. Hence, these lines or drain terminals are connected through pull-up resistors to VCC for conduction mode.
Both signals (SCL and SDA) are bidirectional. They are connected via resistors to the positive power supply voltage. This means that when the bus is free, both lines are of the high. All the devices on the bus must have open-collector or open-drain pins. Activating of the line means pulling it down (Wired AND). The number of devices on a single bus is almost unlimited ā the only requirement is that the bus capacitance does not exceed 400 pF. Because the logical 1 level depends on the supply voltage, there is no standard of the bus voltage.
There are many slave devices are interfaced with the microcontroller with the help of the I2C bus through I2C level shifter IC for transferring the information between them. The I2C protocol used to connect a maximum of 128 (7-bit Slave address) devices that are all connected to communicate with the SCL and SDL lines of the master unit as well as the slave devices. It supports the Multi-master of the communication, which means two masters are used to communicate the external devices.
The I2C bus protocol is the most commonly used in master and slave communication wherein the master is called āmicrocontrollerā, and the slave is the called other devices such as ADC, EEPROM, DAC and similar of the devices in the embedded system. The number of slave devices is connected to the master device with the help of the I2C bus, wherein each slave consists of the unique address to communicate it. The following steps are used to communicate the master of the device to the slave:
For normal data of the transfer on the I2C bus, only one master can be active. If for some reason of the two masters initiate the I2C command at the same time, the arbitration procedure determines which of the master wins and can continue with the command. Arbitration is performed of the SDA signal while the SCL signal is high. Each master of the checks if the SDA signal on the bus corresponds to the generated SDA signal. If the SDA signal on the bus is low but it should be high, then this master has lost the arbitration. Master I2C device that has lost arbitration can generate SCL pulses until the byte ends and must then release the bus and go into slave mode. The arbitration of the procedure can continue until all the data is transferred. This means that in the multi-master system each I2C master of the must monitor the I2C bus for collisions and act accordingly.
The Slave devices that need some time to process received byte or are not ready yet to send the next byte, can pull off the clock low to signal to the master that it should wait. Once the clock is released the master can proceed with the next byte.
A slave address may contain a fixed of the programmable part. Some slave of the devices has few bits of the I2C address dependent on the level of address pins. This way it is possible to have on the same I2C bus more than one I2C device with the same fixed part of the I2C address.
The allocation of I2C addresses is administered by the I2C bus committee which takes care of the allocations. Two groups of 8 I2C addresses are reserved for future uses and one address is used for 10-bit I2C addressing.
Slave Address | R/W Bit | Description |
---|---|---|
0000000 | 0 | General Call Address |
0000000 | 1 | START Byte |
0000001 | X | CBUS Address |
0000010 | X | Reserved for different BUS Format |
0000011 | X | Reserved for future purpose |
00001XX | X | HS-Mode & Master mode |
11111XX | X | Reserved for Future Purpose |
11110XX | X | 10-bit Slave Addressing |
The I2C (Inter-Integrated Circuit) protocol is a serial communication protocol that allows multiple devices to communicate with each other using a common bus. Here are some common applications of the I2C protocol:
The I2C (Inter-Integrated Circuit) protocol is a popular serial communication protocol that is used in a wide range of applications. Here are some of the advantages of using I2C:
While the I2C (Inter-Integrated Circuit) protocol offers many advantages, there are also some disadvantages that should be considered when choosing a communication protocol for a particular application. Here are some of the disadvantages of using I2C:
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