Mastering MIPI I3C Protocol: A Comprehensive Guide to Efficient Communication Between Devices

Overview of MIPI I3C Protocol

The increasing use of sensors in mobile devices has made it challenging for designers to use traditional methods such as I2C and SPI. In response, the members of the MIPI alliance introduced an improved version of I2C, called I3C. I3C is designed to accommodate low-speed peripherals and sensors in computer systems, while adding a variety of new system interface features. I3C maintains backward compatibility with existing I2C slave devices, but native I3C devices support higher data rates similar to those offered by Serial Peripheral Interface (SPI). While both I2C and I3C use SCL and SDA lines, I2C only supports four speed modes (100KHz, 400KHz, 1MHz, 3MHz), whereas I3C supports speeds up to 12.5MHz in single data rate mode. I3C also boasts a high throughput bit rate of up to 25 Mbps DDR mode. The primary purpose of MIPI I3C is to provide an improved communication protocol for sensors and low-speed peripherals in mobile devices.

MIPI I3C is a new communications protocol designed to offer enhanced interoperability and scalability for the Internet of Things (IoT) and mobile devices. It combines features from existing protocols such as MIPI D-PHY, SPI, UART, USB 2.0, I2C and more into one unified interface that can be used by multiple devices in a single system. The goal of this protocol is to reduce complexity while improving overall performance on the device side.

Introduction to MIPI I3C Protocol

MIPI stands for “MIPI Improved Inter-Integrated Circuit” and is intended to be a successor to the popular I2C (Inter-Integrated Circuit) protocol. I3C is designed to provide a faster, more efficient, and more flexible communication interface than I2C, while maintaining backward compatibility with I2C devices. It supports both two-wire and three-wire interfaces, as well as multi-drop and broadcast modes.

MIPI I3C is an industry-standard communication protocol that enables high-speed, low power, and cost-efficient connectivity between various devices. It was developed to provide a unified interface for embedded systems and mobile applications. As such, it is designed to support a wide range of data transfer rates from very low speeds up to 10 Gbps (Gigabits per second). The protocol also offers support for multiple types of frame formats which can be used in different scenarios depending on the application requirements.

One of the most important features offered by MIPI I3C Protocol Frame format is its flexibility when it comes to size and complexity. This allows developers to tailor their frames according to specific requirements while still maintaining compatibility with existing hardware components or other protocols like USB or Ethernet. For example, some frames may require more overhead than others due additional information such as addressing fields or checksums; however these extra bytes are not necessary if they are not needed by the particular application scenario at hand – thus allowing developers greater control over how much bandwidth they consume during data transfers without sacrificing performance quality..

The main purpose behind using MIPI I3C Protocol Frame Format is maximizing efficiency when transmitting large amounts of data between two devices over short distances quickly and reliably – this makes them ideal for use in IoT (Internet Of Things) products where small form factor designs need fast transmission times without compromising signal integrity due limited space constraints inside device enclosures . Additionally , since all messages sent through this type frame contain source/destination addresses , error checking codes , payloads etc., any potential errors can easily be detected & corrected before being passed onto higher layers – thus ensuring reliable communications even under harsh environmental conditions .

History and Inventions of MIPI I3C Protocol

The MIPI I3C protocol was first introduced by the MIPI Alliance, a global organization that develops interface specifications for mobile and mobile-influenced industries. The protocol was designed to replace the aging I2C and SPI interfaces, which had limitations that made them less effective for modern mobile devices.

The MIPI I3C protocol was officially released in January 2017 and has since gained widespread adoption across the industry. It is a scalable, medium-speed bus that combines the features of both I2C and SPI, providing developers with a more efficient and versatile means of connecting peripherals to application processors.

One of the main benefits of the MIPI I3C protocol is its ability to support a wide range of devices and applications, including sensors, touch screens, and other types of peripherals. It is also highly flexible, allowing for a variety of data transfer modes, including burst, continuous, and event-driven data transfers.

In addition to its technical capabilities, the MIPI I3C protocol was designed to be a cost-effective solution for mobile device manufacturers. It streamlines the integration process, reducing the need for additional hardware and minimizing the overall bill of materials for mobile devices.

Features of MIPI I3C Protocol

The MIPI I3C protocol offers a range of features that make it an attractive communication interface for a variety of applications. Here are some of its key features:

1. Multi-Drop and Broadcast Capabilities: I3C supports multi-drop and broadcast modes, which allow for more efficient communication with multiple devices on the same bus.
2. Faster Data Transfer Rates: I3C can transfer data at speeds of up to 33.33 Mbps, which is faster than I2C’s maximum speed of 3.4 Mbps.
3. Supports both Sensor and Control Interfaces: I3C can be used for both sensor and control interfaces, making it ideal for a wide range of applications, including mobile devices, IoT, and automotive systems.
4. Dynamic Addressing: I3C supports dynamic address assignment, which makes it easier to add or remove devices from the bus without having to manually configure their addresses.
5. Hot-Join and Hot-Swap Support: I3C supports hot-join and hot-swap capabilities, which allow for devices to be added or removed from the bus while it is still running.
6. Built-in Arbitration and Error Detection: I3C includes built-in arbitration and error detection mechanisms, which help to prevent data collisions and ensure reliable communication.
7. Low-Power Operation: I3C is designed to operate at low power levels, making it ideal for battery-powered devices.
8. Backward Compatibility with I2C: I3C is backward compatible with I2C devices, allowing for a smooth transition from I2C to I3C in existing systems.
9. Secondary Master: Assumes temporary control from the primary master and returns control back to the primary master upon completion of the control tasks.
10. In-band Interrupt: The I3C protocol offers in-band interrupts using the 2-wire interface, resulting in a significant reduction in device pin count and signal paths. This feature also facilitates the integration of additional sensors within a device.
11. Standard CCC Commands: The I3C protocol employs standard CCC commands for communication with I3C slaves. Upon recognizing the command, the slaves respond back to the master via I3C bus communication. It’s worth noting that these commands are universal for all I3C devices, unlike I2C.

MIPI I3C Protocol Message Frame Format

The frame format for the MIPI I3C protocol consists of several fields.

Lets discuss about each field of the MIPI I3C protocol frames.

• S/Sr: S or Sr stands for Start or Restart or Repeated Start Condition.
  • S/Sr = 0: When the S or Sr bit is set to 0, it indicates that a repeated start condition will occur after the current transaction, and the next transaction will continue without a stop condition in between. This is typically used when a master device wants to perform multiple transactions with the same slave device without releasing control of the bus in between, but also wants to indicate that the subsequent transactions are part of the same logical transfer.
  • S/Sr = 1: When the S or Sr bit is set to 1, it indicates that a stop condition will occur after the current transaction, and the next transaction will begin with a start condition. This is typically used when a master device wants to perform multiple transactions with the same slave device without releasing control of the bus in between.
• SA / (R/W)/ACK:
  • Slave Address (SA):
    • BSA: Broadcast Slave Address or Broadcast Message Slave Address is 0x7E. MIPI I3C does support a multicast feature, which allows a master device to send the same command or data to multiple slave devices simultaneously. This is achieved by using a multicast address that is recognized by all the target slave devices. The multicast feature can be used in cases where multiple devices need to receive the same data or perform the same action, such as in a system-level synchronization or for updating firmware on multiple devices at once.
    • DSA: Dynamic Slave Address or Dynamic Address Assignment (DAA) mechanism is used to assign dynamic slave addresses to devices on the bus. This allows new devices to be added to the bus without requiring a fixed pre-assigned address. The DAA mechanism is used by a new slave device to request an address from the master device during the initialization phase of the bus. The new device sends a DAA command to the master, which responds by sending a unique dynamic address to the new device. This dynamic address is temporary and may change during the lifetime of the bus. To ensure that the dynamic address is unique, the master device maintains a list of assigned dynamic addresses and only assigns an address that is not already in use. The assigned dynamic address is then used by the new device to communicate with the master and other devices on the bus.
    • SSA: Static Slave Address is nothing but the classic I2C Slave addresses. In the MIPI I3C protocol, static slave addresses can be used to assign fixed addresses to devices on the bus. This is an alternative to using dynamic addressing, which assigns temporary addresses to devices during initialization. Static addressing can be useful in certain scenarios, such as when a device has a known and fixed location on the bus, or when a device needs to be assigned a specific address for compatibility reasons with legacy systems. To use static addressing in MIPI I3C, a device is assigned a fixed address during the design and manufacturing process. This address can be programmed into the device’s hardware or configured using software during the device initialization phase.
  • R/W: The Read/Write bit in the MIPI I3C protocol is used to indicate the direction of data transfer in a transaction between a master device and a slave device. When the master device wants to read data from a slave device, it sets the Read/Write bit to 1 in the command packet. The slave device then responds with a data packet that contains the requested data. Conversely, when the master device wants to write data to a slave device, it sets the Read/Write bit to 0 in the command packet. The data to be written is included in the command packet, and the slave device acknowledges the write by sending a response packet back to the master device.
  • ACK: The ACK/NACK bit in the MIPI I3C protocol is a signal that indicates whether a packet was successfully received by the recipient device or not. It is used by slave devices to acknowledge the receipt of data or commands from the master device.
• Data (Optional)/Command Code/T:
  • Data (Optional): In the MIPI I3C protocol, data can be transferred between devices on the bus as part of a command or as optional data. The data is transferred using the MIPI I3C Data Message (DM) packets, which can carry up to 255 bytes of data.
  • Command Code: In the MIPI I3C protocol, command codes are used to indicate the type of command being sent from a master device to a slave device. The command codes are 8-bit values that are included as part of the command packet sent on the bus.
  • Transition (T): Transition bit Alternative to ACK or NACK. The transition bit in the MIPI I3C protocol serves a different purpose than the ACK or NACK signals used in other protocols such as I2C. While ACK and NACK signals are used to indicate whether a data transfer was successful or not, the transition bit in MIPI I3C is used to indicate the start of a new packet and synchronize the bus.
• Stop Condition (P): The Stop Condition bit in the MIPI I3C protocol is a signal that indicates the end of a transaction on the bus. It is used by the master device to signal that it has finished transmitting data or commands to a slave device.

Working Principle of MIPI I3C Protocol

The MIPI I3C protocol works by establishing a communication link between a master device and one or more slave devices over a two-wire or three-wire interface. The I3C Protocol relies on a frame-based communication structure, which includes a START signal, one or more transfers, and a STOP signal. This structure is similar to that of I2C messages, and the maximum clock speed supported by the I3C interface is 12.5MHz.

In addition to Single Data Rate (SDR) messages, the I3C interface also supports High Data Rate (HDR) messages, which are equivalent to clock cycles. Two types of messages are available: Broadcast messages, which allow the master to communicate with all slaves on the bus, and Direct Common Command Code (CCC) messages, which allow the master to communicate with specific slaves.

The I3C protocol is based on a frame encapsulation approach, which always includes a START signal, a Header, data, and a STOP signal. The I3C bus is always initialized in SDR mode and never in HDR mode. Common Command Code (CCC) commands are formatted using only SDR and can be transmitted to a specific slave or all slaves on the I3C bus. The CCC General format is illustrated in the figure below.

Basic Operations of MIPI I3C Protocol

The I3C is a bidirectional serial bus that employs two wires, namely SCL clock line and SDA data line. It supports various speed grades with a maximum data transfer rate of 12.5Mbps at a clock frequency of 12.5 MHz in SDR mode. The I3C bus initiates a transaction with a START condition (SCL should be held high, and SDA should transition from high to low).

Subsequently, the address of the slave device or broadcasted address with W/R bit is transmitted. After the initial start address, arbitration may occur in the I3C bus, and the device with the lowest address wins. For the broadcasted address, all the slave devices on the I3C bus should send an acknowledgment (except I2C slaves). Conversely, only a particular slave sends an acknowledgment for a slave address. Following the acknowledgment, the I3C bus proceeds with write, read, or CCC command data. The I3C master can opt to STOP (SCL should be held high, and SDA should transition from low to high) or can issue a repeated start after a transaction (using the host controller command).

How does MIPI I3C Protocol works in HDR Modes?

• Initially, the I3C bus master sends a dedicated Broadcast I3C address (0x7E) to all slaves on the bus.
• Afterward, one of the Enter HDR CCCs is sent to indicate that the master is entering the HDR mode. It should be noted that each HDR mode has its own corresponding Enter HDR CCC.
• Subsequently, one or more HDR transfers take place.
• The HDR mode is terminated by utilizing the HDR exit pattern protocol.
• HDR TSP (Ternary Symbol rate Pure).
• HDR TSP (Ternary Symbol rate Pure).
• HDR TSL (Ternary Symbol rate Legacy). where data is sent on a combination of the clock and data achieving 1.5 bits per symbol (27.5 Mbps, and 39.5 Mbps)
• HDR-BT or the HDR Bulk Transfer mode is a feature in MIPI I3C protocol that enables high-speed data transfer between devices using the High Data Rate (HDR) mode. This mode is used to transfer large amounts of data, such as image or video data, in a single transaction.

I3C Protocol Data Transfer Modes

MIPI I3C protocol supports several data transfer modes to enable efficient communication between devices. Some of the commonly used data transfer modes in MIPI I3C protocol are:

1. SDR Mode: The Single Data Rate is an I²C-like single data rate (SDR) messaging mode running up to 12.5 Mbps.
2. HDR Mode:
   • HDR-DDR Mode.
   • HDR-TSL Mode.
   • HDR-TSP Mode.
   • HDR-BT Mode.

It is really bit complecated to say the practical bitrate of the MIPI protocol. But as per Matthew Schnoor, a debug architect at Intel and a member of the MIPI Debug Working Group, states that the effective bitrates of using Standard-Data-Rate (SDR) mode or one of several High-Data-Rate (HDR) modes, including HDR-Double Data Rate (HDR-DDR), HDR Ternary Symbol Legacy (HDR-TSL), HDR-Ternary Symbol Pure (HDR-TSP), and HDR-Bulk Transport (HDR-BT), depend on the chosen mode and the number of lanes used. Table 1, assuming a clock speed of 12.5 MHz, provides the effective bitrates for single, double, and quad-lane implementations for each mode.

Basic Command Codes used in MIPI I3C Protocol

• Event Enable/Disable.
• Activity States.
• Payload Mgmt.
• I3C Feature Mgmt (Dynamic Address Assignment, Mastership, HDR Modes.
• Timing Control).
• Test Modes.
• Extensible Space (MIPI and Vendor).

Here’s how the MIPI I3C Protocol works explained in more detail below

1. Initialization: The master device initializes the I3C bus by sending out a start signal. This signal indicates that the bus is ready to communicate and that any connected slave devices should listen for commands.
2. Addressing: The master device then sends out an address packet, which specifies the address of the slave device that it wants to communicate with. In multi-drop mode, multiple slave devices can be addressed using the same address packet.
3. Data Transfer: Once the slave device has been addressed, data can be transferred between the master and slave devices. This is done by sending data packets back and forth between the two devices. The data packets include information such as the type of data being transferred, the length of the data packet, and any error correction codes.
4. Arbitration: If multiple devices try to communicate on the bus at the same time, arbitration mechanisms built into the protocol ensure that only one device can transmit at a time. This helps to prevent data collisions and ensure reliable communication.
5. Error Detection and Correction: The I3C protocol includes built-in mechanisms for detecting and correcting errors that may occur during data transfer. These mechanisms help to ensure that data is transferred reliably and without errors.
6. Hot-Join and Hot-Swap: The I3C protocol supports hot-join and hot-swap capabilities, which allow for devices to be added or removed from the bus while it is still running. This makes it easier to add or remove devices from the bus without disrupting communication.

MIPI I3C Protocol Bus Configurations

The MIPI I3C protocol supports multiple bus configurations to accommodate different types of devices and applications. Some of the common bus configurations used in the MIPI I3C protocol are:

1. Pure Bus: only I3C devices connected on the bus.
   • SCL can be set to 12.5MHz.
   • All HDR modes can be used.
   • This is the ideal case in term of performance.
2. Mixed Fast Bus: I3C and I2C devices connected on the bus, but I2C devices have a 50 ns spike filter.
   • SCL has to be lower (usually around 8.3MHz if you make low period twice as big as high period).
   • HDR-DDR and HDR-TSL can be used.
   • This is a good compromise when you have to connect both I2C and I3C device on an I3C bus.
3. Mixed Slow Bus: I3C and I2C devices connected on the bus, but some I2C devices do not have a 50 ns spike filter.
   • SCL is limited to the slowest I2C device on the bus.
   • HDR modes are not supported.

Applications of MIPI I3C Protocol

The MIPI I3C protocol is a versatile and powerful communication interface that can be used in a wide range of applications. Some common applications of the MIPI I3C protocol include:

1. Mobile Devices: The MIPI I3C protocol is commonly used in mobile devices such as smartphones, tablets, and wearables, where it is used to communicate with sensors, cameras, and other peripherals.
2. Internet of Things (IoT): MIPI I3C is also used in IoT devices such as smart home appliances, industrial sensors, and medical devices, where it provides a reliable and efficient communication link between devices.
3. Automotive Systems: The MIPI I3C protocol is used in automotive systems for communication between sensors, cameras, and other electronic components, such as in advanced driver assistance systems (ADAS).
4. Industrial Automation: The MIPI I3C protocol is used in industrial automation applications, such as factory automation and robotics, where it provides a fast and reliable communication link between devices.
5. Medical Devices: The MIPI I3C protocol is used in medical devices such as patient monitoring systems, imaging equipment, and diagnostic devices, where it provides a reliable and efficient communication link between devices.

Advantages of MIPI I3C Protocol

The MIPI I3C protocol offers a number of advantages over other communication protocols. Here are some of the key advantages of MIPI I3C:

1. Multi-Drop and Broadcast Capabilities: I3C supports multi-drop and broadcast modes, which allow for more efficient communication with multiple devices on the same bus.
2. Faster Data Transfer Rates: I3C can transfer data at speeds of up to 33.33 Mbps, which is faster than I2C’s maximum speed of 1 Mbps.
3. Supports Both Sensor and Control Interfaces: I3C can be used for both sensor and control interfaces, making it ideal for a wide range of applications, including mobile devices, IoT, and automotive systems.
4. Dynamic Addressing: I3C supports dynamic address assignment, which makes it easier to add or remove devices from the bus without having to manually configure their addresses.
5. Hot-Join and Hot-Swap Support: I3C supports hot-join and hot-swap capabilities, which allow for devices to be added or removed from the bus while it is still running.
6. Built-in Arbitration and Error Detection: I3C includes built-in arbitration and error detection mechanisms, which help to prevent data collisions and ensure reliable communication.
7. Low-Power Operation: I3C is designed to operate at low power levels, making it ideal for battery-powered devices.
8. Backward Compatibility with I2C: I3C is backward compatible with I2C devices, allowing for a smooth transition from I2C to I3C in existing systems.
9. Reduced Pin Count: I3C has a reduced pin count compared to other communication protocols, which helps to reduce the overall system cost and complexity.

Disadvantages of MIPI I3C Protocol

While the MIPI I3C protocol offers many advantages, there are also some potential disadvantages to consider. Here are some of the key disadvantages of MIPI I3C:

1. Limited Adoption: MIPI I3C is a relatively new protocol, and its adoption is not as widespread as some other communication protocols. This can make it more difficult to find compatible devices and tools.
2. Complexity: The MIPI I3C protocol is more complex than some other communication protocols, which can make it more difficult to implement and troubleshoot.
3. Limited Cable Length: The maximum cable length for I3C is shorter than some other communication protocols, which can limit its use in certain applications.
4. Requires Specialized Hardware: I3C requires specialized hardware to implement, which can increase the cost and complexity of a system.
5. Compatibility Issues: While I3C is backward compatible with I2C devices, there may be some compatibility issues with certain devices that do not fully support the I3C protocol.
6. Not Suitable for High-Speed Communication: While I3C offers faster data transfer rates than I2C, it may not be suitable for high-speed communication applications that require even faster data transfer rates.

Future Development and Enhancement of I3C Protocol

MIPI I3C protocol has been designed with a focus on scalability, flexibility and expandability to support the future requirements of a diverse range of devices and applications. There are several ways in which the protocol can be further developed and enhanced:

1. High-Speed HDR Mode: Currently, the highest data rate supported by I3C is 26.7Mbps, which is achieved using the HDR-DDR mode. However, there is still scope for further improvement in data transfer rates. Future enhancements could focus on developing higher-speed HDR modes that offer greater bandwidth and reduced latency.
2. Advanced Power Management: I3C already offers low power consumption compared to other serial buses, but further improvements can be made in the area of advanced power management. This could include the development of power management techniques that enable sensors to be powered down when not in use, thereby conserving battery life.
3. Support for New Sensors: As new types of sensors are developed, I3C protocol can be expanded to support these sensors. This could include developing new CCC commands that are specific to these sensors, as well as updating the I3C specification to include new device types and features.
4. Improved Security: With the increasing importance of security in IoT and other applications, I3C could be enhanced to provide improved security features. This could include the development of secure boot mechanisms, encryption techniques and authentication protocols to ensure the integrity and confidentiality of data transmitted over the bus.
5. Integration with Other Bus Standards: While I3C is designed to be a standalone bus interface, there is potential for it to be integrated with other bus standards such as USB and PCIe. This would enable devices to communicate over multiple bus interfaces, offering greater flexibility and expandability.

Conclusion of I3C Protocol

• MIPI I3C Basic is a subset of MIPI I3C that bundles the most commonly needed I3C features for developers and other standards organizations.
• The mobile ecosystem and broader system integrator community can efficiently use these capabilities as an alternative to I2 C.
• MIPI I3C interface has been developed to ease sensor system design architectures in mobile wireless products by providing fast, low cost, low power digital interface for sensors.
• Implementing I3C increases the flexibility mobile terminal system designers have to support an ever expanding sensor subsystem as efficiently and at as low cost as possible.
• MIPI I3C satisfies broad range of applications that extends beyond smart phones.
• Over time MIPI I3C could conceivably become much more than a standardized sensor interface and develop into a de facto bus communication standard for touch sensing, always-on and low resolution cameras, acoustics, environmental sensors and transducers that currently use I²C, SPI, UART and others.